Added known issues before assembly

2026-07-28 07:46:42 +02:00
parent d62a31dbb6
commit 81729ff39e
8 changed files with 228 additions and 24 deletions
@@ -40,4 +40,40 @@ The firmware will have to be as efficient as possible to allow 10-12 channels at

 ## Project Status

-V1.0 is currently in production at Aisler.com and will be assembled by myself
+V1.0 is currently being assembled by myself and testing will soon start.
+
+## known V1 issues
+
+There are a few problems with the V1 of this PCB and they are pretty serious so I would advise not to send any of these files to be produced and to either modify these mistakes or to wait for a V1.1 or V2 of this board.
+
+### Bad selection of Rp2350 ports
+
+This is the most embarassing problem of them all. I put a bit too much faith in the MUX capabilities of the rp MCU and choose the SPI and QSPI pins incorrectly.
+
+The RAM needs to be totally rerouted, 5/6 pins are wrong and need to be changed :
+
+```
+RAM_QSD3 not to GPIO 16 but to QSPI_SD3
+RAM_QSD2 not to GPIO 17 but to QSPI_SD2
+RAM_QSD1 not to GPIO 18 but to QSPI_SD1
+RAM_QSD0 not to GPIO 19 but to QSPI_SD0
+RAM_QSCLK not to GPIO 20 but to QSPI_SCLK
+```
+
+This is extremely embarassing as the pins are even labeled, I should have seen this before sending the files to production.
+
+The W5500 and SD CARD are wired wrong too as even if the selected pins are correct, not all pins of a SPI bank can do every job.
+
+So you have to do these swaps :
+
+```
+ETH_CS GPIO28 to GPIO29
+ETH_SCLK GPIO29 to GPIO30
+ETH_MISO GPIO30 to GPIO28
+```
+
+And for the SD card its all wrong as I did not plan for SPI0 and SPI1 differences.
+
+I would advise not to botch anything but rather use a PIO SPI that then can be used on pretty much any pins.
+
+Those mistakes are extremely embarassing but they exist and will have to be dealt with when assembling the boards.