 Maxluli
|
272346629b
|
Started wiring the ADCs
|
2026-07-12 18:25:53 +02:00 |
|
|
Maxluli
|
d3c295670b
|
Advanced on the layout
|
2026-07-12 16:59:42 +02:00 |
|
|
Maxluli
|
29f1f73a01
|
Progress on the layout
|
2026-07-09 18:35:25 +02:00 |
|
|
Maxluli
|
7326734320
|
Multi channle shinanegans
|
2026-07-09 16:29:56 +02:00 |
|
|
Maxluli
|
4606285ee9
|
Multi channel layout set up for the 12 channels of audio acquisition
|
2026-07-08 18:10:54 +02:00 |
|
|
Maxluli
|
461d383f9f
|
Commit before trying something
|
2026-07-08 17:35:02 +02:00 |
|
|
Maxluli
|
5670cf61c4
|
Regrouped PCB layout
|
2026-07-08 17:09:13 +02:00 |
|
|
Maxluli
|
c7eeed7b61
|
Quick fixes
|
2026-07-06 21:15:46 +02:00 |
|
|
Maxluli
|
f54d1c5726
|
replaced 3.3v LDO for easier to solder version with even lower noise
|
2026-06-28 19:03:19 +02:00 |
|
|
Maxluli
|
9966213619
|
Ready to start routing
|
2026-06-28 12:51:13 +02:00 |
|
|
Maxluli
|
5ec1b1ee14
|
Ethernet connectivity schematic + TCXO accurate time added to the DACs
|
2026-06-25 12:36:44 +02:00 |
|
|
Maxluli
|
8f85058641
|
Initial commit
|
2026-06-18 15:06:54 +02:00 |
|